When working with semiconductor wafers, it is desirable to handle thick wafers to ensure they do not break during processing. However, the deeper the via, the harder it is to get a seed layer into it using currently available deposition techniques and equipment, particularly if cost is a consideration. Typically, applying a seed layer to a depth of more than 150 um in a narrow via is generally difficult and cost-ineffective. Thus, it is difficult to use the vias of the aforementioned patent applications on a wafer while maintaining the typically about 500 to 750 um (or thicker) thickness that is common to most commercially available wafers, without first thinning them, if a plating approach to filling the narrow width vias will be used. However, thinning such wafers to the appropriate thickness can render the wafers flexible but, because they are brittle, significantly likely to break during handling. While this may be an acceptable risk for a pre-processed wafer, where the cost is minimal, it is not acceptable for a fully processed wafer (i.e. one that already has undergone at least its front end processing, and in many cases its backend processing as well) because the cost is significantly higher.